Memory organisation
Instruction set
Status register (SREG):
| Name | |
|---|---|
C |
Carry flag |
Z |
Zero flag |
N |
Negative flag |
V |
Two’s compliment overflow flag |
S |
Sign flag |
H |
Half carry flag |
T |
Transfer bit |
I |
Global interrupt enable bit |
Registers and operands:
| Name | |
|---|---|
Rd |
Destination (and source) register |
Rr |
Source register |
R |
Result |
K |
Constant data |
k |
Constant address |
b |
Bit position in register |
s |
Bit position in status register |
X,Y,Z |
Indirect address register |
A |
IO memory address |
q |
Displacement for direct addressing |
UU |
Unsigned and unsigned operands |
SS |
Signed and signed operands |
SU |
Signed and unsigned operands |
ADC
Add with carry. Adds registers Rd and Rr and the contents of the C flag and stores the result in register Rd. Sets H, S, V, N, Z, C.
0001 11rd dddd rrrr |